Acoustic charge transport (ACT) phenomena in III-V semiconductor material has only recently been demonstrated. Such devices have applications as high speed analog signal processors. Delay lines have been fabricated in gallium arsenide (GaAs) structures comprising a surface acoustic wave (SAW) transducer that launch a surface acoustic Wave along upper layers of GaAs or (AlGa)As substrate having transport channel formed therein. An input electrode sources charge to be transported by the propagating potential wells. There is also an electrode receiving a signal for modulating that charge. Spaced down the transport channel are one or more nondestructive sensing (NDS) electrodes for sensing the propagating charge. There is also an ohmic output electrode for removing the charge.
Initial acoustic charge transport devices were comprised of a thick epilayer (TE-ACT), With vertical charge confinement accomplished by means of an electro-static DC potential applied to metal field plates on the top and bottom surfaces of the GaAs substrate. The field plate potentials are adjusted to fully deplete the epilayer and produce a potential maximum near the midpoint thereof. Consequently, any charge injected into the channel is confined to the region of maximum DC potential.
Lateral charge confinement (Y direction) has been achieved in several Ways Typically, a mesa is formed to define a charge transport channel. However, for thick epilayer acoustic transport devices, the mesa must be several microns in height, a fact which presents problems in fabrication and is a major impediment to the propagating surface acoustic Wave. Blocking potentials extending down both sides of the delay line have also been used to define the transverse extent of the channel, as has proton bombardment to render the material surrounding the channel semi-insulating.
A heterostructure acoustic charge transport (HACT) device (HACT) has been fabricated using a GaAs/AlGaAs heterostructure that is similar to that of quantum well lasers and heterostructure field effect transistors FET (e.g. HFET, MODFET, HEMT and TEGFET devices). A HACT device is comprised of a sequence of epitaxial layers and vertically confines mobile carriers through the placement of potential steps that result from band structure discontinuities. Besides providing for inherent vertical charge confinement, the HACT devices are thin film devices whose layers have a total thickness of approximately 0.25 microns, excluding a buffer layer.
A cap layer is provided With a HACT device both to protect an upper (AlGa)As layer and to permit fabrication of low resistance ohmic contacts and low leakage Schottky metalization. However, it is not possible to systematically and repeatedly produce a layered structure with the required sheet resistivity. Consequently, wafers must often be discarded because the grown resistivity of the device is not in an acceptable range. It would be advantageous to have a method and apparatus for fabricating lII-V devices capable of adjusting the resistivity thereon after layer growth is complete, thereby reducing the number of unsuitable wafers and increasing device yield. The present invention is drawn towards such a device.